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 LFTVS18-1F3
Low forward voltage TransilTM, transient voltage suppressor
Features

Low forward voltage: 1.1 V @ 850 mA Peak pulse power (8/20 s): 350 W Very low clamping factor VCL/VBR Unidirectional device Fast response time Very thin package: 0.605 mm RoHS compliant Figure 1. Pin configuration (bump side)
Flip chip (4 bumps)
Complies with the following standards:
IEC 61000-4-2 level 4 - 15 kV (air discharge) - 8 kV (contact discharge)
A
B 1 2
Description
The LFTVS18-1F3 is a single line diode designed specifically for the protection of integrated circuits in portable equipment and miniaturized electronics devices subject to ESD and EOS transient overvoltages. Figure 2.
Device configuration
A1 and A2
B1 and B2
TM: Transil is a trademark of STMicroelectronics
March 2008
Rev 1
1/7
www.st.com
Characteristics
LFTVS18-1F3
1
Characteristics
Table 1.
Symbol
Absolute maximum ratings (Tamb = 25 C)
Parameter Peak pulse power dissipation (10/1000 s pulse) Test condition Value 44 Tj initial = Tamb 350 tp = 10 ms Tj initial = Tamb 7 125 -55 to +150 A C C W Unit
PPP
Peak pulse power dissipation (8/20 s pulse) Non repetitive surge peak forward current Maximum operating junction temperature Storage temperature range
IFSM Tj Tstg
Table 2.
Symbol VBR IRM VRM VCL Rd IPP T VF Symbol VBR IRM VCL VF T Cline
Electrical characteristics (Tamb = 25 C)
Parameter Breakdown voltage
IF I
Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Voltage temperature coefficient Forward voltage drop Test conditions IR = 1 mA VRM = 10 V IPP = 1 A
(1)
Slope = 1/Rd
VCL VBR VRM IRM
VF V
IPP
Min. 16
Typ.
Max. 18 500 19 1.1 9
Unit V nA V V 10-4 / C
IF = 850 mA
VR = 0 V, VOSC = 30 mV, F = 1 MHz
130
pF
1. 8 / 20 s pulse waveform
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LFTVS18-1F3
Characteristics
Figure 3.
Relative variation of peak pulse power versus initial junction temperature
Figure 4.
Peak pulse power versus exponential pulse duration (typical value)
Tj initial = 25 C
PPP[Tj initial] / PPP[Tj initial=25C]
1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 25 50 75 100 125 150
10000
PPP(W)
1000
100
Tj(C)
tp(s)
10 1 10 100 1000
Figure 5.
Clamping voltage versus peak pulse current (typical values)
Figure 6.
Relative variation of leakage current versus junction temperature (typical values)
10.0
IPP(A)
1000
tp = 10/1000 s Tj initial = -30 C Tj initial = 25 C Tj initial = 85 C
IR[Tj] / IR[Tj=25C]
VR =10V
100
1.0
10
VCL(V)
0.1 15 16 17 18 19 20 21 22 23 24 25
1 25 50 75
Tj(C)
100 125
Figure 7.
Forward voltage drop versus peak forward current (typical values)
Figure 8.
Junction capacitance versus reverse voltage applied (typical values)
IFM(A)
1.E+02
Capacitance(pF)
140
120
Tj initial = 25 C
1.E+01
Tj initial = 85 C Tj initial = -30 C
80
40
VFM(V)
1.E+00 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
0 0 -2
Voltage(V)
-4 -6 -8 -10
3/7
Ordering information scheme Figure 9. Breakdown voltage versus initial Figure 10. Frequency response junction temperature (typical value)
0.00
LFTVS18-1F3
19.0
VBR(V)
-15.00
18.0
-30.00
17.0
-45.00
Tj( C)
16.0
-60.00
F/Hz
60 85 110 135
100.0k 1.0M 10.0M 100.0M 1.0G
-40
-15
10
35
Figure 11. ESD response to IEC 61000-4-2 (+8 kV contact discharge)
Figure 12. ESD response to IEC 61000-4-2 (-8 kV contact discharge)
X: 20ns/div Y: 10V/div
X: 20ns/div Y: 10V/div
2
Ordering information scheme
Figure 13. Ordering information scheme
LF
Low forward voltage Transient voltage suppressor Breakdown voltage 18 = 18 VMAX Number of lines 1 = single line Package F = Flip chip 3: lead free, pitch = 400 m
TVS 18 - 1 F3
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LFTVS18-1F3
Package information
3
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 14. Flip chip dimensions
400 m 40
400 m 40 605 m 55
185 m 10
0.77 mm 30 m
205 m 40
185 m 10 0.77 mm 30 m 255 m 40
Figure 15. Footprint recommendations
Copper pad Diameter: 220 m recommended 260 m maximum Solder mask opening: 300 m minimum
Figure 16. Marking
Dot xx = marking z = manufacturing location yww = datecode (y = year ww = week)
Solder stencil opening: 220 m recommended
xxz y ww
5/7
Ordering information Figure 17. Flip chip tape and reel specifications
Dot identifying Pin A1 location 4 0.1 O 1.5 0.1
LFTVS18-1F3
1.75 0.1 3.5 0.1
0.87
xxz yww xxz yww xxz yww
0.71 0.05
All dimensions in mm
8 0.3
User direction of unreeling
0.87
4 0.1
Note:
More information is available in the application notes: AN2348: "400 m flip chip: Package description and recommendations for use" AN1751: "EMI Filters: Recommendations and measurements"
4
Ordering information
Table 3. Ordering information
Marking EM Package Flip chip Weight 0.86 mg Base qty 5000 Delivery mode Tape and reel (7")
Order code LFTVS18-1F3
5
Revision history
Table 4.
Date 06-Mar-2008
Document revision history
Revision 1 Initial release. Changes
6/7
LFTVS18-1F3
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